1. Field of the Invention
The invention relates to a semiconductor switching device for switching at high frequencies, specifically to a compound semiconductor switching device operating at frequencies equal to or higher than 2.4 GHz.
2. Description of the Related Art
Mobile communication devices such as mobile telephones often utilize microwaves in the GHz range, and commonly need switching devices for high frequency signals which are used in switching circuits for changing antennas and switching circuits for transmitting and receiving such signals. A typical example of such a switching device can be found in Japanese Laid-Open Patent Application No. Hei 9-181642. Such a device often uses a field-effect transistor (called FET hereinafter) formed on a gallium arsenide (GaAs) substrate, as this material is suitable for use at high frequencies. Developments have been made in forming a monolithic microwave integrated circuit (MMIC) by integrating the aforementioned switching circuits.
FIG. 1A is a cross-sectional view of a conventional GaAs FET. The GaAs substrate 1 is initially undopped, and has an n-type channel region (or a channel layer) 2 formed by doping with n-type dopants beneath its surface. A gate electrode 3 is placed on the surface of the channel region 2, forming a Schottky contact. A source electrode 4 and a drain electrode 5 are placed on both sides of the gate electrode 3, forming ohmic contacts to the surface of the channel region 2. In this transistor configuration, a voltage applied to the gate electrode 3 creates a depletion layer within the channel region 2 beneath the gate electrode 3 and, thus, controls the channel current between the source electrode 4 and the drain electrode 5.
FIG. 1B shows the basic circuit configuration of a conventional compound semiconductor switching device called an SPDT (Single Pole Double Throw) switch, using GaAs FETs. The source electrode (or the drain electrode) of each FET (FET1 and FET2) is connected to a common input terminal IN. The drain electrode (or source electrode) of each FET (FET1 and FET2) is connected to respective output terminals (OUT1 and OUT2). The gates of FET1 and FET2 are connected to the control terminals Ctl-1, Ctl-2 through resistors R1, R2, respectively. A pair of complementary signals is applied to the two control terminals, Ctl-1, Ctl-2. When a high level signal is applied to the control terminal of one of the FETs, the FET switches on, and a signal fed to the common input terminal IN passes through the FET and reaches one of the output terminals OUT1, OUT2. The role of the resistors R1 and R2 is to prevent leakage of the high frequency signals through the gate electrodes to the DC voltages applied to the control terminals Ctl-1, Ctl-2, which are substantially grounded at a high frequency.
The switching device shown in FIG. 1B must have shunts, which lead leaking signals to the ground, in order to attain a high degree of isolation. Alternatively, the gate width may be reduced to about 600 xcexcm without utilizing shunts so that the overall size of the switching device is reduced with proper isolation, as described in commonly owned copending U.S. patent application Ser. No. 09/855,030, entitled xe2x80x9cCOMPOUND SEMICONDUCTOR DEVICE FOR SWITCHING.xe2x80x9d The disclosure of U.S. patent application Ser. No. 09/855,030 is, in its entirety, incorporated herein by reference.
In the switching device configuration of FIG. 1B, the control terminal Ctl-1 is connected via the resistor R1 to the gate of FET 1, which is the closer of the two FETs to the control terminal Ctl-1. In the same manner, the control terminal Ctl-2 is connected via the resistor R2 to the gate of FET2. However, some device designs call for a configuration in which the control terminal Ctl-1 is connected to the gate of FET2, which is the further of the two FETs from the control terminal Ctl-1. The control terminal Ctl-2 is connected to the gate of FET1, which is the further of the two FETs from the control terminal Ctl-2. This configuration will be referred to as a mirror configuration hereinafter. Because in the mirror configuration the wiring and resistor connecting the control terminal and the gate electrode are disposed in the peripheral portion of the chip to detour around the elements of switching device, size reduction gained by the device configuration with 600 xcexcm gate-width FET is somewhat sacrificed.
The invention provides a semiconductor switching device including a first field effect transistor and a second field effect transistor. Each of the transistors comprises a source electrode, a gate electrode and a drain electrode which are formed on the channel layer of the respective transistor. A common input terminal is connected to the source electrode or the drain electrode of the first transistor and is also connected to the source electrode or the drain electrode of the second transistor. A first output terminal is connected to the source electrode or the drain electrode of the first transistor which is not connected to the common input terminal. A second output terminal is connected to the source electrode or the drain electrode of the second transistor which is not connected to the common input terminal. The switching device also includes a first control terminal and a second control terminal. A first resistor connects the second control terminal and the gate electrode of the first transistor. A second resistor connects the first control terminal and the gate electrode of the second transistor. In this configuration, the gate electrodes of the first transistor and the second transistor receive control signals so that one of the transistors opens as a switching element and the other transistor closes as another switching element. At least a portion of the first resistor and at least a portion of the second resistor are disposed underneath the pad metal layer. At least a portion of the first resistor and at least a portion of the second resistor are disposed between the first and second transistors and the common input terminal.
The invention also provides a semiconductor switching device including a first field effect transistor and a second field effect transistor. Each of the transistors comprises a source electrode, a gate electrode and a drain electrode which are formed on the channel layer of the respective transistor. A common input terminal is connected to the source electrode or the drain electrode of the first transistor and is also connected to the source electrode or the drain electrode of the second transistor. A first output terminal is connected to the source electrode or the drain electrode of the first transistor which is not connected to the common input terminal. A second output terminal is connected to the source electrode or the drain electrode of the second transistor which is not connected to the common input terminal. The switching device includes a first control terminal and a second control terminal. A first resistor connects the second control terminal and the gate electrode of the first transistor. A second resistor connects the first control terminal and the gate electrode of the second transistor. In this configuration, the gate electrodes of the first transistor and the second transistor receive control signals so that one of the transistors opens as a switching element and the other transistor closes as another switching element. At least a portion of the first resistor and at least a portion of the second resistor are disposed between the first and second transistors and the common input terminal. The first control terminal and the first output terminal are disposed closer to the first transistor than the second transistor. The second control terminal and the second output terminal are disposed closer to the second transistor than the first transistor. A portion of the first transistor is disposed between the first control terminal and the first output terminal, or a portion of the second transistor is disposed between the second control terminal and the second output terminal.